New High-Performance Op Amp

After completing the Type S DC Amplifier, which offered 1pA input bias current, and good bandwidth, I wanted to revisit the Type C DC Amplifier. I had intended this design to be a "Common" or general-purpose op amp. Its nominal intended use case was for control voltage addition, but the performance was generally so good that other applications in the EMS came to mind. The original Type C DC Amplifier design was based on the 2N3904 and 2N3906. It was rather compact, and had good wideband performance, but the Vos was around 60mV and the Ib was not to my liking due to the more limited gain on the 2N3904 operated at lower collector currents. A 10 kΩ load was selected to enable use of a larger valued current-limiting resistor in the Class A output stage, instead of a Current Regulating Diode (CRD), which could allow more drive current at less power dissipation. The Class A output stage was set to enable signal drive of 22Vpp with a load of 10 kΩ, based on ±18V power supplies, but more signal swing seemed possible, and that had additional applications.

I subsequently developed a Type CA DC Amplifier design in response, which used 2N5088 and 2N5087 devices which had much higher gain at lower collector current - but this ultimately turned out to be a problem, not a solution. This design had no problem with wideband response for 10 kΩ loads, and it had amazing Vos < 1mV. This is attributed to the 2N5088 NPN transistor, which appear extremely closely matched without any binning. Not only that, some of these transistors I'm using were manufactured 25 years ago. The use of very high gain transistors though made the design very sensitive to RFI and external signal coupling, and it was easily induced into oscillation with 100 kΩ input and feedback resistors. Just holding my hand nearer the solderless breadboard actually induced more noise!

Separately, I discovered that my EE lab has a RFI problem with noise signals around 2.5 MHz, impinging on breadboards at 10-150mV, even when the power supply is off! It's probably from WiFi equipment, but when also combined with a previous discovery that my EE lab does not (yet) having a good AC ground for the mains voltage, things just get weird at certain impedance or gain ranges.

The Type CA design needed to be redone, and there were things about the Type C design that I wanted to change in general. Here were the considerations, which of course have conflictual requirements:

I wanted to keep the wideband audio performance, the large FPBW >> 20 kHz.
The very low Vos from the Type CA design was most welcome. Several sets of random 2N5088 transistors and from different date codes have been very consistently matched.
The low-level sensitivity issue needed to be completely eliminated. Even with eventual PCB implementation that would include good power and ground planes, this issue with the Type CA design seemed too risky.
I really wanted signal drive for 1.2 kΩ load, while also getting the signal swing much closer to the ±18V power supplies. With a 1.2 kΩ load, and a sufficiency of signal swing, a resistive pad could be made to drive 600 Ω loads at EMS system levels of either ±5V or ±10V, if not larger. A resistive pad would also totally isolate the op amp from the system completely to allow output short-circuit resilience.
The Class A output from both Type C and Type CA designs afforded excellent harmonic distortion performance, and the CRD device allowed modest power dissipation for a 2N3904 output stage vs. using a low-valued current-limiting resistor. Additionally, the CRD solution offers a lower component count vs. using a transistor current source/sink.
Both the Type C and Type CA designs had issues with large signal pulse fidelity. This would have to addressed as part of this do-over.
Replacing the differential pair resistor with a current source would provide much lower Ib, but replacing that current source with a CRD would greatly reduce the component count without compromising performance. Use of the CRD with typ. 300 µA was confirmed after first testing with a 225 µA transistor current source.

After three rounds of prototyping development on a solderless breadboard, a new modified design emerged. This new design becomes the new Type C, combining ideas from both the previous Type C and Type CA designs, plus adding some new fixes. Here's a summary of performance characteristics that emerged:

The offset voltage |Vos| ≤ 1mV, and this was tested working through several sets of 2N5088 transistors. The op amp has good gain (143 dB typ.) and when combined with low offset and moderate Ib (300 nA) accurate DC addition is possible with precision resistors for voltage-controlled circuits.
With 1.2 kΩ load: FPBW of 30 kHz at 28 Vpp.
Circuit can add, subtract, produce signal gain, and it allows large DC offsets at the positive input without deleterious effects. The input resistors can be 10 kΩ or 100 kΩ. So, a great number of the standard op amp circuits will work.
The Class A output provides very good harmonic response. Driving the 1.2 kΩ load, a 1 kHz sinusoidal wave at 20 Vpp was measured to have a SFDR of 70 dB from 0-20 kHz.
Adding on a pi output attenuator acting as a 1.2 kΩ load, output voltage swings of up to 14 Vpp could be driven externally from 600 Ω, and the amplifier isolated from short-circuits.
For situations where large signal pulse dynamics need to be mitigated, Schottky diode clamps can be added to either the negative input and ground, or across the two inputs. The residual pulse response has small damped oscillatory aberrations ≤ 8%, which could be further ameliorated with a compensation capacitor across the feedback resistor. For 10Vpp pulses into 1.2 kΩ, the rise time was about 2.0 µs, and the fall time was about 1.3 µs, the asymmetry being inherent from a single ended output drive. Worst case slew rate is hence about 5V/µs.

What follows is the main schematic and some exemplary scope fotos. The components used for the application at hand can be changed for specific purposes. For example, in a control-voltage adder application, with low-frequency signals, the pulse management clamp diodes D2 and D3 could be omitted. Similarly, for internal signal processing applications, if only using medium impedance loads such as 10 kΩ or greater, then D5 can be omitted, and the other diode D4 replaced with a CRD having a lower current rating appropriate for the load. This will result in less power dissipation.