To construct the Model III EMS from discrete transistors, I have evolved a series op Amp designs for various use cases throughout the system. One application for example is control voltage addition for synthesis circuits. This application requires good DC gain so that (aside from sign inversion) control voltages are added accurately. But a small offset voltage is tolerable because the DC gain is usually small (e.g. -1), and the circuits being controlled are already flexibly voltage controlled - the small offset voltage in the summation really makes no operational difference, because the user is tuning frequency or time, changing the desired settings by ear.
Other applications are more demanding though. For example receiving a very wide dynamic range of current from a bipolar junction transistor used as an exponential or logarithmic generator. Run of the mill Silicon transistors can have a 9 decade dynamic range of current output. So the input bias current of an op amp has material impact on how much of this dynamic range can be operationally be preserved. A related application is high gain and very low input bias current for precision integrators used for triangle wave and envelope generators.
The Type S ("Special") DC amplifier design shown below has about 1 pA input bias current at room temperature. This was computed from a bench test on a solderless breadboard where a capacitor in an integrator configuration was shorted out then allowed to drift for a very long time to where millivolts could read out with an oscilloscope. Based on this, the Ib could be inferred from the voltage measurement, the time involved and the capacitor value.
The Type S is part of a series of ±18V powered discrete transistor building blocks designed using a mix of classical ideas liked matched transistor pairs but also newer discrete Silicon devices like Current Regulating Diodes (CRDs). As well, the designs have evolved over the years to offer more performance with fewer components for more compact PCB layout. The CRDs replace transistor current sources for biasing as well as for high-performance low-power Class-A output stages. The workhorse in this design is the LS840 dual matched JFET, made by Linear Integrated Systems. Which fortunately nowadays is tariff-free in the United States. The design was otherwise characterized for 2kΩ loads, wideband performance, 22 Vpp signal swing, and low-distortion.
The schematic and some exemplary scope fotos follow.
Type S DC Amplifier Design
G=-1 Amplifier with 20 kHz 90% duty-cycle sawtooth at 20 Vpp
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