Schmitt Trigger

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The transistor Schmitt trigger is an amazing circuit, astounding in terms of how much complex behavior can come from just the two transistors used to implement it. Essentially, the Schmitt trigger is a differential amplifer used in switching mode with regenerative (positive) feedback. With care, this circuit can be used as part of the core of a voltage-controlled oscillator (VCO). It combines the functionality of a voltage reference, two voltage comparators and a digital latch into a very compact form consisting of two transistors and five resistors. I have added a sixth resistor in the circuit design below, to provide isolation from switching events at the base of the input transistor.

I've studied a lot of 1960s and 1970s transistor design manuals and circuit design text books to better understand the behavior of this circuit. Actually, a number of the aforementioned references, including the GE Transistor Manual, Sixth Edition (1964) explain how the Schmitt trigger works. Even the tome Pulse, Digital, and Switching Waveforms, Millman & Taub, Second Edition (1968) provides strong analytical detail about the Schmitt trigger. I used this reference text earlier in 2018 to develop a more precise circuit design.

I did a lot of experimentation with various designs, including using Zener diodes to provide precision voltage shifts. One thing was very clear from this experimental work is that a single Schmitt trigger provides more reliable switching thresholds than two IC comparators doing the same job, because the Schmitt trigger has a single hysteresis for the input threshold on both sides of the preset limits. Whereas the switching speed of IC comparators changes with the voltage slope rate at the input. To circumvent this problem with ICs, an additional small hysteresis is generally needed for both comparators. This degrades threshold precision because no two will ever be the same. Another thing about the transistor circuit versus ICs is that the transistor circuit is very fast. And within triggering range that response time speed is constant over a very large frequency range. Using components that cost pennies like the 2N3904 transistor, Schmitt triggers can have an output voltage change of ΔVo ≈ Vbe in well under 100 ns with consistency. This is important because the longer and more variable propagation delays of 500 ns to 1.3 µs in typical IC comparators (such as the popular LM393 and the LM339 devices) are a large fraction of the period of a higher-frequency audio signal.

But I could not seem to translate the engineering analysis of how the Schmitt trigger works into what component design values give specific results. What was missing in all of my previous research was a clear procedure on how to design the circuit for specific requirements like setting of the threshold voltages. With a bit more research I finally located one, written by a B. Pounder, in the UK hobbyist magazine Practical Electronics, from January 1970.

So, I tested that procedure to build a Schmitt trigger to specifications I wanted for a VCO core: Thresholds set at ±3V, using Moog power supply voltage levels +12V/-6V. Based on my bench testing, this smaller range was more favorable to fast switching operations than use of ±15V supplies. There's no need to swing more ΔV than needed to switch other circuits. I really did need bipolar input range, because in a VCO  this signal would come from an integrator switched by the Schmitt trigger. A simple trick I grokked from using the procedure from the 1970 reference is to translate +12V/-6V power supplies to a single +18V power supply, then realign the threshold voltages to a notional +18V circuit. So, in an equivalent +18V circuit the upper threshold of +3V of the +12/-6V circuit is equivalent to +9V in the +18V circuit. Similarly, the lower threshold of -3V is equivalent to +3V.

The design procedure from the 1970 reference just worked! It was almost magical in how practical the procedure is. The test design yielded relatively balanced ± thresholds, which with ±4V inputs provided very close to 50.0% duty cycle digital outputs over a very wide frequency range. The hysterisis was within 90%  of the requested 6V. I intentionally set ΔVth > 5V sensing that the design might offer a bit less. I suspect now that the generally higher β of late-modern Silicon transistors like the 2N3904 may have played a role in the 10% ΔVth error -- as versus the "rules of thumb" that may have been more applicable for transistors in 1970. More analysis is indicated. The design freedom though wrought from the "practical procedure" is extremely enabling, yielding numerous alternative options.

The 1970 procedure will now be adapted and normalized to a +18V single supply Schmitt Trigger circuit:

Reference Characterisitics of Transistor

  1. 2N3904 Vbe @ 10mA|25℃ = 725 mV. Use for Vbe1
  2. 2N3904 Vbe @ 3mA|25℃ = 500 mV. Use for Vbe2
  3. 2N3904 β > 100 for current ranges and temperature. Choose minimum β = 100.
(Data cribbed from the Fairchild ⇒ Onsemi 2N3904 datasheet)

Design Requirements

  1. Select an upper threshold voltage V1 = 9V.
  2. Select a lower threshold voltage V2 = 3V.
  3. Choose an output swing voltage Vo = 5V.
  4. Choose an operational current for the collector of Q2, Ic2 = 10 mA.

Design Procedure

  1. Calculate R5 = Vo/Ic2. R5 = 5V/20mA = 500Ω.
  2. Choose Vcc > Vo. Vcc = 18V.
  3. Calculate R1 + R2 + R4 = (β×Vcc)/(10×Ic2). R1 + R2 + R4 = (100×18V)/(10×10mA) = 18kΩ.
  4. Calculate R4 = (β×V1)/(10×Ic2). R4= (100×9V)/(10×10mA) = 9kΩ.
  5. Calculate R3 = (V1 - Vbe1)/Ic2. R3 = (9V - 0.725V)/10mA = 827.5Ω.
  6. Calculate Ic1 = (V2 - Vbe2)/R3. Ic1 = (3V - 0.500V)/827.5Ω = 3mA.
  7. Calculate R1 = Vcc(1 - (V2/V1))/Ic1. R1 = 18V(1 - (3V/9V))/3mA = 4kΩ.
  8. Calculate R2 = (R1 + R2 + R4) - (R1 + R4). R2 = (18kΩ) - (4kΩ + 9kΩ) = 5kΩ.
  9. Constraint Check: β×R3 > R4(R1 + R2)/(R1 + R2 + R4). 100×827.5Ω > 9kΩ(4kΩ + 5kΩ)/18kΩ, 82.75kΩ > 6.5kΩ. Confirmed.

Values for R1-R5 were chosen to the nearest 1% value. R6, a 2kΩ 5% resistor, was used to isolate switching events seen at the base of Q1 from the driving circuit (a test signal generator).

An engineering notebook page and scope fotos characterizing the circuit design now follows.

Schematic and Characterization Notes in Engineering Notebook.

I/O at 1 Hz, ±4V triangle wave stimulus.

I/O at 10 Hz.

I/O at 100 Hz
I/O at 100 Hz.

I/O at 1 kHz.

I/O at 10 kHz.

I/O at 100 kHz. First visible distinction between edge rates.

The dynamic signals seen at Q1/Q2 emitters (CYN) and Q2 base (GRN). 1 kHz input.

Dynamic signals near output rising edge at 200 ns/div.

Dynamic signals near output falling at 200 ns/div.














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