Wideband Sinusoidal Frequency Doubler

While developing various ±18V circuit designs for the synthesizer, I was starting to work on a 20Vpp precision hysteresis switch for a Triangle Wave Generator that would be the core of a VCO. My function generator could not generate large enough voltage swing for testing this circuit concept until a 2x power amplifier arrived.

So, in the interim, I decided to look into a wideband full wave rectifier circuit design, the idea being this would facilitate harmonic generation with the eventual VCO and form a nexus for a "Grand Harmonic Oscillator" quest I was otherwise working on. I did several engineering literature searches on this, including buying one article from the UK. A common theme of the research was a transistor differential pair. I tried several circuits with differential pairs and could not get them to work as indicated. Generally, signal combinations of the outputs from the differential pair, even when driven differentially, result in either zero output against a DC offset, or would result with 2X signal gain, against a DC offset.

A particular thing I was trying to avoid was any circuit that would require an op amp -- I was looking for a way to use transistors directly, and not op amps as building blocks with transistors. In diagnosing the differential pair circuits that did not work, versus those with an op amp and transistors, I discovered that the missing ingredient was some form of an alternator, a switch or otherwise changing circuit that could respond to polarity changes from the input bipolar waveform. Now, in a normal full wave rectifier, this action is accomplished by a quad of diodes; in a precision rectifier, an op amp is used to provide gain that allows the diode action to be nearly perfect. 

I wanted none of that, because it increased circuit complexity and component count. Another reason for "direct realization" was to allow wideband response, not limited to 1-10 MHz unity gain frequencies of op amps. While I pondered the "alternation problem," I began to wonder: "Could this all not be done instead with an analog computational circuit?" If possible, that would eliminate the alternation problem, though it would work mainly for sinusoidal inputs (as a squarer) vs. a full wave rectifier, which could accommodate triangle wave inputs.

This led me back to 1970's Translinear circuits. I had already developed a "front end," a differential pair that would yield differential outputs from a single ended DC input. This very much reminded me of various Translinear circuits which represented bipolar inputs as (1+X) ✕ Iref and (1-X) ✕ Iref -- exactly the case in hand. What was needed now was the computational circuit.

This came in the form of a two-quadrant squarer, a current--mode translinear circuit.

Theory of Operation
Q1A/Q1B are the input differential pair, enabling an input ±10V input signal to be attenuated via R1/R2. This results in splitting a nominal 1.50 mA current from D1 (a Current Regulating Diode, or CRD) across the Q1A/Q1B collector outputs, based on the input signal polarity against the DC reference voltage at Q1B. R3 and R4 provide a DC balance trim, as the matched pair of Q1A/Q1B transistors does have |Vos| ≤ 3-5mV, and this manifests as imbalance at the collectors due to transconductance gain. Q2A/Q2B, along with D4-D7 and Q3 form a two-quadrant squarer. Basically, the currents into Q1A/Q1B form a logarithmic voltage Q2A/Q2B, which is then added together at their emitters to form an additional logarithmic voltage at Q3, the readout transistor. The output current from Q3's collector is effectively X ✕ X ✕ Iref, the original 1.5 mA current source, where X is the differential current split from D1 via Q1A/Q1B collectors. The CRD D2 supplies a nominally matching current to D1, which sets the compliance range for comparison with Q2A/Q2B of the differential output currents from Q1A/Q1B. The CRD D3 just provides a reference current for Q3 to subtract from to generate a voltage into the readout resistor R5; this sets the DC baseline, and R5 quantifies the currents out of Q3.

Circuit Design Notes

Q1A/Q1B was specified as a LS351, an available high-gain, high-bandwidth matched PNP pair. Q2A/Q2B was specified as a semi-available LM394C, a super-matched NPN pair. In this application, the LM394 is operated at < the 20V Vceo(br) limit. The LS351 has a 60V limit. Given the need to trim |Vos| via P1, R2 and R3 probably don't really need to be 0.1% resistors, but I found from my VCA research that matching the base voltages at the differential pair precisely helps quite a lot; so: old habits die hard! D3 sets the DC offset seen at the voltage readout and could be anything desired for the readout resistor R5. Another value of R5 could be chosen for different voltage readout with given currents.

Other scales could easily be chosen, for the input voltage range, the output voltage range, and the various currents used. The circuit does have some limitations. The circuit is not a monolithic IC design, which is often attributed within the domain of translinear circuit design. D4-D7 are ordinary 1N4148 diodes, and are not IC-implemented diode-connected matching transistors that match with Q2A/Q2B. Q1A/Q1B of course are PNP matches pairs, enabled by discrete realization, as versus oxide-isolated PNP/NPN matching pairs that would be possible in IC form.

As a result of discrete implementation, the circuit does have certain thermal properties over seconds or tens of seconds of time. The DC baseline of the output shifts some 10s of millivolts in open air, but very slowly. Still! The circuit works really well and can generate a relatively clean sinusoid at 500 kHz from a 250 kHz input. None of these situations appears consequential to the intended use case of DC-coupled input, AC-coupled output. As well, at higher frequencies some DC imbalance seems to creep into the output sine wave. This would only provide a DC offset in a frequency mixer application, using higher frequencies. It would not affect the perceived tone in a down-conversion frequency synthesis application. So, none of these situations are seen as degrading the intended use case for audio or for frequency synthesis using linear mixers.

Below next are the engineering notes, with schematic; then following that are several annotated scope fotos.

Engineering Notes and Schematic


The traditional Michal Baxter Labs 1 kHz I/O signals.


Balance trim for signals < 20 kHz seems to hold over a very wide range; 10 kHz shown here.


1 Hz in, 2 Hz out.


100 kHz to 200 kHz, minor amplitude loss.


The circuit does squaring, not full wave rectification. So, triwaves get bent at 2x output frequency.


Just amazing that it works at all, and so well! 250 kHz to 500 kHz frequency conversion.


20 kHz input example.

Circuit does not multiply square waves, as these are merely DC constants as seen by the squarer.








































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