Frequency Divider

As a key element of the Model III EMS, I'm developing a Harmonic Oscillator which can flexibily generate and control a number of harmonics simultaneously. I'm exploring a number of techniques to do this and it's not quite clear yet which method provides the necessary capability with a moderate amount of circuitry. This effort is in a research and development phase.

Frequency Divider with CD4018B and CD4081B

In this 2024 research and development, I keep discovering the magic of CD4000 CMOS from 1970s 😂. The CD4018B device is capable of binary divisions, but also divisions by odd numbers < 10. The CD4018B counter has an internal 5-bit Johnson counter, which enables ÷2, ÷4, ÷8, and ÷10 directly, through selective feedback to the DATA input. Using only a single 2-input AND gate output connected to the counter DATA input, with select counter output tied to the AND gate, the divisions ÷3, ÷5, ÷7, and ÷9 are enable. This is very convenient! Additionally, the output square waves are absolutely clean divisions, with only two state transitions per cycle.

Sometimes, having just really useful but simple things "just work" is most helpful. I built a CMOS digital divider that can generate odd frequency divisions with relatively wide pulse widths. In other words, the divider can divide by odd numbers, but doesn't generate narrow pulse widths, or an uneven pulse train in so doing. So these waveforms do not contain pulse-position jitter as would be the case for the output from a Binary Rate Multiplier (BRM) like the CD4089B used as a frequency divider.

Some example waveforms now follow. The top trace (yellow) is the input clock. The second from the top top trace (magenta) is the divided output, take from DATA, or pin 1 of the CD4018B. The bottom two traces (cyan and green) are the Q1/ and Q2/ outputs from the counter.