After a few days design wrestling with the Type Y Fast Comparator, I was finally able to improve the design, and fix some short-comings. This work yielded the Type Y1 Fast Comparator, which was aimed at some specific improvements:
- Snappier (e.g. faster) response, esp. to low-frequency signals. This meant improving the gain of the differential input stages, and more thought to how programmed currents were being applied. Also wanted were general improvements in the Vos and improved accuracy of the comparator.
- Inverting the circuit design to use NPN differential stage, PNP current mirror for output extraction. This was desirable because sourcing an output from the +15V rail would allow either a positive-going unipolar, or bipolar output. In particular, sourcing from +15V into a 1.5KΩ resistor to GND would create a faster responding output, because compared to the bipolar-only output of the Type Y1 Fast Comparator, the output signal swing would only swing 1/2 as far, a truly inexpensive doubling of speed. Using the Type Y circuit from -15V to GND seemed not that useful ... though in certain paraphase applications, it could be.
- The inverted circuit design was also desirable because I needed eliminate using the high-ß 2N5087 PNP transistors. They are the matching PNP for the 2N5088 NPN, but they have become available only from one vendor, who is charging approximately 4x the normal pricing. In addition, it was desirable to use low-cost and faster 2N3906 PNP transistors in the output stages, including for the current mirror. High-ß performance and mirror accuracy are not necessary for the current mirror, because the whole circuit is being used as a non-linear stage. The accuracy of the comparator is actually set by the "magic" high-ß 2N5088 transistors. Empirically, random selection of these transistors has resulted in Vos < 10 mV!
- Reconfigure the differential input to be a composite Darlington configuration, and not wired as an independent pairs of transistors. The Type Y Fast Comparator used 2 additional current sources, and this seemed excessive. A simpler strategy was to just use a Darlington connection with a pair of discrete 2N5088 devices. Also considered was a Sziklai pair, where I was contemplating using a PN4250A. This complementary composite transistor might still be useful for improving the common-mode range Vcm of the comparator, due to one less Vbe drop. But even the PN4250A devices are becoming sole-sourced, and I need to conserve my collection of existing devices for use in the Exponential Generator. In fact, as a result of the PN4250A problem, I'll be exploring later use of On Semiconductor KSA733 PNP devices, plus their NPN complement, the KSC945. For the moment, the Darlington connection with 2N5088 devices worked marvelously well. In fact, the comparator gain now is so high, that a random wire into an otherwise unloaded input into the comparator self-triggers off of 60 Hz hum in the local environment!
- Another general goal then was to reduce parts count if possible; at least, reduce the transistor count. The new circuit uses 2 fewer parts, and 2 fewer transistors than the Type Y design did.
Schematic
Work Notes
Theory of Operation
Q1/Q3, and Q2/Q4 form a differential pair of Darlington transistors, using high-ß 2N5088 transistors. In the current ranges involved, these "magic" devices offer very high-gain, ß ≥ 350. So, the ß•ß product is very high, 122500. The gain in dB is 20 log (122500), which is a very respectable 101.7 dB. Q1/Q3 link to the -input, and Q2/Q4 the +input, due to the polarities involved with the output stage. Transistor Q7, along with R1 and D1/D2 form a ≈ 10 mA constant current source, which has a PTAT property to provide first-order temperature compensation of differential pair. This current sets up the operating level for the differential pair, and it's the fulcrum that is switched from one side or the other of the differential pair as a bridge circuit. Transistors Q5/Q6, made with 2N3906, form a simple current mirror, providing differential to single-ended translation to output transistor Q8. Even though Q5/Q6 only have moderate ß at the operating current of 10mA, accuracy is not really an issue, because the comparator is basically a non-linear switch circuit. Switching left or right slightly more or less current (due to base-current errors) is immaterial to comparator operation: once the differential pair switches, the rest of the circuit action is to switch all of the current as quickly as possible. When the output of Q6 drops 1 Vbe from the +15V rail, transistor Q8 will turn on through resistor R4. The output switches up to close to +15V (less Vce(sat) of the 2N3906) when Q8 is turned on, otherwise resistor R5 yanks down the output to GND. The Darlington-connected transistors are given a faster turn-off capability through resistors R6/R7.
Performance
After some iteration of component values RP1, R4, and R5, a new circuit resulted was better than the Type Y design in every aspect! The comparator output response time with a Vref of 0V, to the +input, and a triangle wave input to the -input of 5.0 Vpp at 110 Hz as well under 1µS. In addition, risetime and falltime of the ≈ +15V swing output was improved to < 1µS at this very slow frequency.
Then testing was done for each several octaves above 110 Hz, up to 14.08 KHz, as well as 33 KHz. For each case, the slew-rate and propagation delay dramatically improved. The delays are always very small fractions of the waveform period. This is an important factor contributing to pitch accuracy for VCO triangle core integrator loops. The comparator is definitely usable without any output signal loss to at least 100 KHz.
The Vos was indirectly tested by having the TBS1064 scope compute the duty cycle for the output squarewave, given a 5.000Vpp triangle wave input, and Vref = 0.000V.
With some measurements undertaken, the basic performance of the comparator seems to be the following:
Then testing was done for each several octaves above 110 Hz, up to 14.08 KHz, as well as 33 KHz. For each case, the slew-rate and propagation delay dramatically improved. The delays are always very small fractions of the waveform period. This is an important factor contributing to pitch accuracy for VCO triangle core integrator loops. The comparator is definitely usable without any output signal loss to at least 100 KHz.
The Vos was indirectly tested by having the TBS1064 scope compute the duty cycle for the output squarewave, given a 5.000Vpp triangle wave input, and Vref = 0.000V.
With some measurements undertaken, the basic performance of the comparator seems to be the following:
- Vos ≤ 10 mV.
- Output Voh ≈ +14.8V, for Vcc == 15.0V; Vol = 0.0V.
- For 110 Hz ±2.5V triwave input: output risetime ≤ 1µS, falltime ≤ 1µS.
- At higher frequencies, with the above input, the hard limit appears to be ≈ 180 nS.
Main I/O (ORN/BLU) waveforms at 33 KHz, with Q5/Q6 (GRN/VIO) collectors showing the non-linear operation during switching around the reference voltage (0.000 V)
Output risetime for 110 Hz ±2.5V triangle input
Output falltime for 110 Hz ±2.5V triangle input
Damped VHF oscillation in the Q5 2N3096 collector (GRN) during switching.
These transistors are fast! A PCB with ground plane should alleviate this phenomena.
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